Reg (EU) 2024/2847Generate dossier — €149
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Your semiconductor has embedded firmware and security-related functionality. Annex III of Regulation (EU) 2024/2847 classifies microprocessors and microcontrollers with security functions as Important Class I products. Your EU customers will require conformity evidence at the silicon level. CRACheck structures it.

Items 13 and 14 of Annex III explicitly list microprocessors and microcontrollers with security-related functionalities as Important Class I products. That classification changes your conformity assessment path under Article 32 — you cannot rely on self-assessment alone unless you follow harmonised standards or hold an EU cybersecurity certification at assurance level "substantial." Your EU customers' compliance teams already know this. CRACheck generates the 8-document technical dossier in 15–25 minutes. €149 per chip family. Your design data stays on your machine.

Generate CRA dossier — €149Free: check your product classification

€149 one-time · 8-document ZIP · 15–25 minutes · Browser-side

Regulation (EU) 2024/2847 · Art. 31 + Annex VII · Annex III Class I · 8 documents · 100% browser-side

Key numbers

Annex III
Class I classification for security-function chips
€15M
Maximum administrative fine under Art. 64(2)
8 PDFs
Complete dossier per chip family

How CRACheck works

You enter your product data. CRACheck structures the documentation per Article 31 + Annex VII.

1
Classify your semiconductor
CRACheck maps your chip's functionality against Annex III categories (items 13–15) to confirm Default or Important classification
2
Define your silicon specifications
Architecture, firmware version tree, security functions (secure boot, crypto engine, key storage, authentication)
3
Document your development process
Secure design lifecycle, code review protocols, silicon validation, firmware signing
4
Map Annex I essential requirements
How your chip meets each cybersecurity requirement at the hardware and firmware level
5
Complete the vulnerability handling module
PSIRT procedures, CVE coordination, firmware patch distribution to integrators
6
Generate the 8-document dossier
Each PDF references your chip's specific classification and applicable conformity assessment path
7
Deliver to your customer
The dossier integrates into your EU buyer's technical file as component-level evidence

Common mistakes

CLASSIFICATION ERROR

"Our chip is a passive component — it is not covered by the CRA"

If your chip contains embedded firmware, implements security functions (authentication, encryption, secure boot), or processes data, it is a product with digital elements under Article 3(1). Items 13 and 14 of Annex III specifically target microprocessors and microcontrollers with security-related functionalities. A chip with a crypto engine is not a passive component.

ASSESSMENT PATH ERROR

"We can self-assess under Module A like any other product"

Important Class I products can use Module A (internal control, Annex VIII Part I) only if the manufacturer applies harmonised standards covering all essential cybersecurity requirements, or holds an EU cybersecurity certification at assurance level "substantial." Without either, Article 32(2) requires third-party assessment under Module B+C or Module H.

RESPONSIBILITY TRANSFER

"Our integrator customer handles all CRA obligations for the final product"

Article 13 assigns obligations to the manufacturer — defined in Article 3(13) as whoever develops or manufactures the product and markets it under their name. If you sell your chip under your own brand to integrators, you are the manufacturer of that component. Your customer's conformity assessment for the final product does not relieve your own obligations for the chip.

What the ZIP contains

8 PDF documents generated from your data. Each cites the specific article of Regulation (EU) 2024/2847 it complies with.

1

Product Classifier

Confirms classification under Annex III. Documents whether it qualifies as Default, Important Class I (items 13–14), or Class II (tamper-resistant variants, items 3–4). Determines conformity assessment obligations under Art. 32.

2

Technical Documentation

Art. 31 + Annex VII dossier covering silicon design, firmware architecture, security functions, production processes, and supply chain controls.

3

Risk Assessment

Annex I Part I cybersecurity risk analysis. Evaluates threats at the silicon level: side-channel attacks, firmware injection, key extraction, supply chain tampering.

4

User Information

Annex II-compliant package for integrators: secure integration guidelines, firmware update procedures, known limitations, end-of-support timeline.

5

Declaration of Conformity

Art. 28 + Annex V, pre-structured with semiconductor-specific fields: chip family identifier, firmware version matrix, applicable Annex III category.

6

CVD Policy

Coordinated vulnerability disclosure framework. Documents your PSIRT contact, acknowledgement timelines, and coordination protocol with downstream manufacturers.

7

Notification Template

ENISA notification structure for actively exploited vulnerabilities: 24h early warning, 72h notification, 14-day final report per Art. 14.

8

Obligations Calendar

Milestones: Art. 14 reporting from 11 September 2026, full enforcement 11 December 2027, firmware support commitment, patch cycle cadence.

Mira antes de comprar — Descargar dossier de muestra (PDF, empresa ficticia) — Estructura real, artículos reales, formato real. Datos ficticios.

Generated from your data, in your browser. No data leaves your device.

What you pay

🧾 SPECIALISED SEMICONDUCTOR COMPLIANCE FIRM
€12,000–€25,000
6–12 weeks. Requires NDA + sharing design files. One-off engagement — repeat for next tape-out. Output: consultant report, not structured regulatory file.
✓ CRACHECK
€149
8 documents. 15–25 min. 100% browser-side — RTL, firmware, architecture docs never leave your workstation. 10 regenerations for firmware version updates. Pack 10: €99/product. Pack 30: €79/product.

Two layers

● LAYER 1

What CRACheck generates

The documentation layer. Classifies your semiconductor, maps security functions against Annex I essential requirements, structures vulnerability handling procedures, outputs 8 PDFs per Art. 31 + Annex VII. This is the documentation your EU customer needs in their technical file.

∅ LAYER 2

What requires separate action

CRACheck does not perform silicon-level penetration testing, submit applications to notified bodies, or evaluate your secure boot implementation against Common Criteria profiles. If your chip is Important Class I without harmonised standard coverage, Article 32(2) requires third-party assessment — CRACheck produces the documentation that feeds into that assessment, but the assessment itself is separate.

Start with Layer 1. The documentation is what procurement contracts are demanding right now. Layer 2 actions become mandatory as the December 2027 deadline approaches.

Enforcement regime

Article 64 of Regulation (EU) 2024/2847.

🔴
Essential requirements + manufacturer obligations (Art. 64(2))
€15,000,000 / 2.5%

Non-compliance with Annex I + Arts. 13–14.

🟠
Documentation and conformity obligations (Art. 64(3))
€10,000,000 / 2%

Non-compliance with Art. 18, Art. 28, Art. 31, Art. 32.

🟡
Misleading information (Art. 64(4))
€5,000,000 / 1%

Supplying incorrect or misleading information to authorities.

Alternatives

CriterionSpecialised ConsultantIn-house Legal TeamIndustry Consortium TemplateCRACheck
Time per chip family6–12 weeks8–16 weeks (no CRA expertise)2–4 weeks adaptation15–25 minutes
Cost€12,000–€25,000Senior hire + trainingConsortium fee + staff time€149
IP exposureNDA required, files sharedInternalShared framework dataZero — 100% browser-side
Annex III-awareDepends on consultant's CRA depthLearning curveGeneric templatesBuilt-in Annex III classification

Documenting multiple chip families?

Semiconductor companies typically need documentation for each distinct chip family marketed in the EU. Volume pricing: €99 per product (pack of 10), €79 per product (pack of 30). Each family gets its own classified, Annex VII-aligned dossier.

Request Volume Pricing
Each chip family with distinct firmware or security functions requires a separate dossier.

What CRACheck guarantees and what it does not

CRACheck generates a structured document aligned with Article 31 and Annex VII of Regulation (EU) 2024/2847 based on the information you input about your semiconductor product. The accuracy and completeness of the data — including your chip's security functions, firmware architecture, and vulnerability handling processes — is your responsibility as manufacturer.

We guarantee that the output structure follows Art. 31 + Annex VII and that all legal references are correct. We do not guarantee that a specific document will satisfy a notified body during a conformity assessment procedure or be accepted by a market surveillance authority in a particular case.

CRACheck is not legal advice. For questions about your chip's Annex III classification, conformity assessment path under Article 32, or obligations related to harmonised standards, consult a regulatory attorney specialised in EU product compliance.

Frequently asked questions

Are all semiconductors classified as Important under Annex III?
No. Only microprocessors and microcontrollers with security-related functionalities (Annex III Class I, items 13–14), tamper-resistant microprocessors and microcontrollers (Class II, items 3–4), and ASICs/FPGAs with security-related functionalities (Class I, item 15) are listed. A general-purpose microcontroller without security functions may remain a Default product.
What does "security-related functionality" mean for classification?
Regulation (EU) 2024/2847 does not provide an exhaustive definition, but Annex III items 13–15 target chips implementing authentication, cryptographic processing, secure boot, key storage, or tamper detection. If your datasheet advertises any security function, classify under the relevant Annex III category.
Can we use Module A for an Important Class I chip?
Yes, but only if you apply harmonised standards listed in the Official Journal covering all applicable essential cybersecurity requirements, or hold an EU cybersecurity certification at assurance level "substantial" or higher. Without either, Article 32(2)(a) requires EU-type examination (Module B) plus conformity to type (Module C), or full quality assurance (Module H).
Does CRACheck handle the SBOM requirement?
CRACheck includes a software bill of materials section in the Technical Documentation output. You enter firmware dependencies and CRACheck structures them per Annex VII requirements. The SBOM is part of the technical documentation under Annex VII point 2.
Is this a subscription?
No. One-time payment. 30 days of editing, 10 regenerations. The PDF is yours permanently.
Can I request a refund?
Under Article 16(m) of Directive (EU) 2011/83, licence activation constitutes express consent for immediate digital content generation. Refunds only for reproducible technical failures.
What if the regulation is amended?
Regenerate with the updated CRACheck version at no additional cost during your licence period.
⚠️ Important notice: CRACheck is a self-assessment documentation tool, not legal advice and not a third-party audit. The document under Article 31 and Annex VII of Regulation (EU) 2024/2847 is generated from your input data. You are responsible for the accuracy of the data you provide. CRACheck does not replace a qualified professional assessment.

Your chip is on the Annex III list. Document it before your customer asks.

Eight documents. Article 31 + Annex VII fully structured. Regulation (EU) 2024/2847. Your data stays on your device. The ZIP you download is yours forever.

€149 one-time
8-document professional dossier · 15–25 minutes · No subscription · Browser-side
Generate CRA dossier — €149
✓ Last regulatory check: 1 May 2026 · No substantive changes detected · View history